www.pads.com
4
offering industry-specific requirements,
PADS Professional offers breakthrough
advantages for FPGA applications. The
implementation flow supports
applications ranging from commercial
datacom and telecom designs through
automotive to military-aerospace and
safety-critical systems that require not
only performance but also specific
system requirements such as power
efficiency.
Because more FPGAs are being designed
into low-power applications, you not only
need to carefully select the most power
efficient device but also must ensure their
implementation flows reduce device
utilization and power to the greatest
extent possible. Starting with design
entry and compilation, PADS Professional
offers leading edge HDL language
coverage for proficient interpretation and
optimization from HDL to the target FPGA
architecture resulting in smaller and faster designs.
Likewise, architecture specific optimization for each FPGA
device fully utilizes architecture specific features and
advantages to meet design requirements.
FPGA I/O Optimization
Today’s FPGAs are very powerful devices with high pin
count, numerous I/O standards and high speed
capabilities. In addition, advanced implemented logic in
the FPGA very often requires that hundreds of logical
signals be mapped to physical
signals. This is a challenge for hard–
ware engineers to match the HDL
world with the electrical world.
An automated FPGA symbol gen–
eration process typically saves as
much as 30X over traditional man–
ual processes. The process uses
correct-by-construction, rule-driven
I/O assignment with a library of
FPGA vendor devices, including early
access to not yet released devices.
In light of these challenges, PADS
Professional fully supports FPGA-on-
board integration, reducing time to
market and manufacturing costs
through reduced layer counts, via
counts and design cycle time.
Achieving Electrical Sign-off
PADS Professional includes a powerful and fast design
rule checking tool . It verifies complex design rules that
are not easily simulated, such as rules for EMI/EMC. With
support for design rule checks for items such as traces
crossing splits, reference plane changes, shielding, and
via checks, you can quickly and easily pinpoint trouble
spots on your board that can cause issues with EMI/
EMC, signal integrity, and power integrity.
PADS Professional bridges HDL-based FPGA design and PCB design for automated, fast
and error-free, bi-directional information exchange.
Design rule checks can be performed on boards for EMI/EMC issues, as well as signal integrity
and power integrity issues. It is highly customizable, allowing users to create DRCs
for any check they might otherwise perform manually.